Synthesis of synchronous communication hardware in a multiprocessor architecture
- 1 December 1993
- journal article
- Published by Springer Nature in Journal of Signal Processing Systems
- Vol. 6 (3) , 289-299
- https://doi.org/10.1007/bf01608540
Abstract
No abstract availableKeywords
This publication has 9 references indexed in Scilit:
- PIRAMID: an architecture-driven silicon compiler for complex DSP applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- OPERATION/EVENT GRAPHS: A Design Representation for Timing BehaviorPublished by Elsevier ,1991
- Architecture-driven synthesis techniques for VLSI implementation of DSP algorithmsProceedings of the IEEE, 1990
- SPAID: an architectural synthesis tool for DSP custom applicationsIEEE Journal of Solid-State Circuits, 1989
- The design of DSP components for the CD digital audio system using silicon compilation techniquesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- Interprocessor communication in synchronous multiprocessor digital signal processing chipsIEEE Transactions on Acoustics, Speech, and Signal Processing, 1989
- Automatic production of controller specifications from control and timing behavioral descriptionsPublished by Association for Computing Machinery (ACM) ,1989
- An Integrated Automated Layout Generation System for DSP CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1985
- The MIMOLA Design System: Tools for the Design of Digital ProcessorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984