The effect of source/drain processing on the reverse short channel effect of deep sub-micron bulk and SOI NMOSFETs

19 November 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

No. 01631918,p. 427-430
https://doi.org/10.1109/iedm.1995.499230

Abstract

This study presents a systematic investigation of the effects of source/drain processing on the reverse short channel effect (RSCE) and is the first to demonstrate significant differences in the electrical behavior of identically processed silicon-on-insulator (SOI) and bulk devices due to dopant diffusion kinetics. In bulk and SOI devices, the RCSE due to implantation damage enhanced diffusion is minimized if a high temperature rapid thermal anneal follows the source/drain implantation. The magnitude of the V/sub th/ roll-up is significantly smaller in SOI than in bulk. When arsenic concentrations greater than 2.5/spl times/10/sup 20/ cm/sup -3/ are used, arsenic deactivation enhanced diffusion can cause a significant increase in V/sub th/ rollup.

Keywords

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