A shared‐memory virtual channel queue for ATM broadband terminal adaptors
- 1 January 1992
- journal article
- research article
- Published by Wiley in International Journal of Communication Systems
- Vol. 5 (1) , 29-37
- https://doi.org/10.1002/dac.4510050104
Abstract
In order to take advantage of the low entry cost of the future public ATM (asynchronous transfer mode) network with shared facilities, it is highly desirable to interconnect different hosts and local area networks (LANs) to the ATM network. The interface between the computer hosts or LANs and the ATM network, commonly called a broadband terminal adaptor (BTA), provides the necessary format conversion for the data packets and the ATM cells. It is conceivable that multiple packets from different virtual channels are interleaved as they arrive at the receive‐end BTA. The BTA must have a sufficiently large buffer, called a virtual channel queue (VCQ), to temporarily store the partially received packets. Once a complete packet has been received, it is forwarded to the host or LAN. Whenever the buffer fills with all incomplete packets, a packet must be discarded to make room for others. In this paper, we first study, through computer simulations, the buffer size requirement of a shared‐memory VCQ for different numbers of virtual channels at various packet loss probabilities. We then present two different implementation architectures for the shared‐memory VCQ, and compare their hardware complexity. The second architecture with linked‐queue approach, adopted in our work, requires less buffer and has better scalability to accommodate a large number of virtual channels. Various possible error conditions, such as cell losses in the ATM network and the VCQ buffer overflow, are considered. Corresponding solutions are proposed and included in the VCQ designs.Keywords
This publication has 5 references indexed in Scilit:
- A shared buffer memory switch for an ATM exchangePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Buffer sizing at a host in an ATM networkPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1992
- Architecture design for ATM statistical multiplexersInternational Journal of Communication Systems, 1991
- The ATM layer chip: an ASIC for B-ISDN applicationsIEEE Journal on Selected Areas in Communications, 1991
- A SONET STS-3c user network interface integrated circuitIEEE Journal on Selected Areas in Communications, 1991