A 2.3ns access time 4K ECL RAM

• 1 January 1984
• conference paper
• Published by Institute of Electrical and Electronics Engineers (IEEE)
• Vol. XXVII, 220-221
• https://doi.org/10.1109/isscc.1984.1156717

Abstract

Keywords

• READ-WRITE MEMORY
• RANDOM ACCESS MEMORY
• DECODING
• CAPACITANCE
• DELAY ESTIMATION
• DRIVER CIRCUITS
• EPITAXIAL LAYERS
• RESISTORS
• BORON
• ADDED DELAY