The design of an onboard digital Doppler processor for a spaceborne scatterometer

Abstract
[[abstract]]A digital Doppler processor, which will permit the Doppler center frequency of the measurement cell bandwidths to be adjusted to compensate for the effects of the Earth's rotation, will be used in the next NASA spaceborne scatterometer known as NSCAT. The authors describe the design and genesis of the NSCAT digital Doppler processor and discuss the performance tradeoff issues that were evaluated during the design phase. In this FFT (fast Fourier transform)-based technique, computation of the adjustment to the cell center frequencies will be done onboard using an approximate expression for the Doppler shift of the cell center versus orbit time. This technique also permits modification of the parameters used to locate the radar-backscatter-coefficient measurements cells by ground command in response to orbit changes[[fileno]]2030157010044[[department]]電機工程學

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