A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure
- 1 January 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 27 (11) , 1540-1546
- https://doi.org/10.1109/4.165334
Abstract
No abstract availableThis publication has 3 references indexed in Scilit:
- A 100ns 256K CMOS EPROMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- A 62ns 16Mb CMOS EPROM With Address Transition Detection TechniquePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1991
- An investigation of erase-mode dependent hole trapping in flash EEPROM memory cellIEEE Electron Device Letters, 1990