Implementation of a fast digital processor using the residue number system

Abstract

This paper contains a description of a special purpose digital processor which has been implemented using residue arithmetic. The processor does two-dimensional pulse matching by convolving a twodimensional five-by-five filter with the Incoming data stream. The digital processor is controlled by an Intel 8066 16-bit microprocessor and can store up to 16 distinct pulse patterns with the option of elementary error detection. The design employs modular architecture and a pipeline approach with emitter coupled logic (ECL) Integrated circuits and uses table look-up for calculations in the residue number system. Components have been chosen so that the filter is capable of making thirty million five-by-five filter convolutions per second for two-dimensional pulse matching and signal detection. In actual operation the hardware runs error free at the rate of twenty million operations per second. The circulating input buffer is the limiting factor for higher operation rates.

Keywords

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