Simultaneous Floor Planning and Global Routing for Hierarchical Building-Block Layout
- 1 September 1987
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 6 (5) , 828-837
- https://doi.org/10.1109/tcad.1987.1270326
Abstract
No abstract availableThis publication has 17 references indexed in Scilit:
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