Systolic up/down counters with zero and sign detection

Abstract
Although a state encoding scheme for systolic counters has been presented earlier, several important practical problems such as zero test, sign detection, overflow, underflow, and modulo-n (cyclic) counting have not been dealt with adequately. In this paper, design principles for unary and binary systolic up/down counters are presented. The unary counters, which are attractive when dealing with relatively small counts, are based on the systolic stack concept. The binary counters use conventional binary number representation, with several tags associated with each bit position. The binary counter design presented can be generalized to counters with higher-radix state encodings.

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