Memory-a fast path to one memory

1 October 1992

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Spectrum

Vol. 29 (10) , 50-51
https://doi.org/10.1109/6.158637

Abstract

A proprietary scheme for a unified memory system that covers all design aspects to ensure fast display and quick computation is presented. This device replaces extant memory types and their interconnects with unique DRAMs, a high-performance, chip-to-chip interface, and a high speed channel. It delivers a byte of data every 2 ns for a block of information up to 256 bytes long. The features and performance of this DRAM are described.

Keywords

RANDOM ACCESS MEMORY
CLOCKS
COMPUTER DISPLAYS
READ-WRITE MEMORY
COMPUTER GRAPHICS
LATCHES
DELAY
DRIVES
IMPEDANCE
MEMORY ARCHITECTURE

This publication has 0 references indexed in Scilit: