Length reduction of tapered N x N MMI devices

Abstract
The length of N/spl times/N multimode interference-based (MMI) devices scales as the square of the MMI region width, and as a result, the use of these structures for large-N applications can require large chip areas. We discuss the N/spl times/N applications of a recently proposed MMI structure that has smaller device dimensions than conventional multimode interference structures. Numerical simulations of such structures and design rules are presented. Limitations on device performance are discussed.