The Raw microprocessor: a computational fabric for software circuits and general-purpose programs
Top Cited Papers
- 7 August 2002
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Micro
- Vol. 22 (2) , 25-35
- https://doi.org/10.1109/mm.2002.997877
Abstract
Wire delay is emerging as the natural limiter to microprocessor scalability. A new architectural approach could solve this problem, as well as deliver unprecedented performance, energy efficiency and cost effectiveness. The Raw microprocessor research prototype uses a scalable instruction set architecture to attack the emerging wire-delay problem by providing a parallel, software interface to the gate, wire and pin resources of the chip. An architecture that has direct, first-class analogs to all of these physical resources will ultimately let programmers achieve the maximum amount of performance and energy efficiency in the face of wire delay.Keywords
This publication has 6 references indexed in Scilit:
- The future of wiresProceedings of the IEEE, 2001
- Space-time scheduling of instruction-level parallelism on a raw machinePublished by Association for Computing Machinery (ACM) ,1998
- Baring it all to software: Raw machinesComputer, 1997
- NuMesh: An architecture optimized for scheduled communicationThe Journal of Supercomputing, 1996
- The Warp Computer: Architecture, Implementation, and PerformanceIEEE Transactions on Computers, 1987
- A VLSI Architecture for Concurrent Data StructuresPublished by Springer Nature ,1987