Evaluation of charge recovery circuits and adiabatic switching for low power CMOS design
- 17 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 102-103
- https://doi.org/10.1109/lpe.1994.573221
Abstract
A technique called charge recovery or adiabatic switch- ing has been proposed to trade speed for energy consumption in CMOS circuits. We compare the speed/power of charge recovery to standard CMOS logic operating at different sup- ply voltages and demonstrate that the overhead of charge recovery limits the overall power savings. In almost all cases, voltage scaled CMOS dissipates less power for the same level of performance.Keywords
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