The Separation Technique: A Method for Simulating Transistors to Aid Integrated Circuit Design
- 1 February 1968
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-17 (2) , 113-116
- https://doi.org/10.1109/tc.1968.227398
Abstract
—A new technique that uses the transistor itself as a computing element has been developed for simulating transistors on the analog computer. The method is called the separation technique since it separates the high-and low-frequency behavior of the simulated transistor. The high-frequency behavior of the transistor is time scaled by a factor (typically one million) suitable for computer simulation.Keywords
This publication has 0 references indexed in Scilit: