Design considerations for high-frequency crystal oscillators digitally trimmable to sub-ppm accuracy

Abstract
The current consumption of crystal oscillators is usually determined by the steady-state amplitude requirement, rather than the minimum transconductance for oscillation to exist, In a bipolar implementation transconductance is proportional to current, so that current consumption scales with frequency and load capacitance in the same way as transconductance. In a complementary metal-oxide-semiconductor (CMOS) implementation, current scales as the square of transconductance. It is therefore important to distinguish current from transconductance in power estimation for high frequency oscillators. Analytical expressions relating current to steady-state amplitude are used in this paper to estimate the minimum power required for a crystal oscillator at a given frequency. A 78 MHz crystal oscillator is described, which forms part of a regulated system in a pager where the oscillation frequency is controlled digitally to sub-ppm accuracy. The oscillator can be pulled from /spl plusmn/65 ppm to the required frequency with 0.2 ppm accuracy, with a maximum current consumption of 197 /spl mu/A. The circuit has been fabricated in a 1-/spl mu/m CMOS technology. The measured phase noise is -113 dBc/Hz at 300 Hz offset.

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