Experimental evidence for the generation of bulk traps by negative bias temperature stress and their impact on the integrity of direct-tunneling gate dielectrics

1 March 2004

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 139-140
https://doi.org/10.1109/vlsit.2003.1221124

Abstract

Negative Bias Temperature Instability (NBTI) of pMOSFETs with direct-tunneling gate dielectrics was studied in detail. By investigating the effects of positive bias stress on pMOSFETs after exposure to NBT stress, the generation of bulk charge traps in the gate dielectrics during NBT stress was clearly demonstrated for the first time. We consider that the bulk trap generation is due to hydrogen atoms released from the interface. Moreover, we investigated the impact of the bulk traps on the SILC and TDDB, and described strong indications that the same mechanism, namely the hydrogen release, is responsible for both NBTI and TDDB of pMOSFETs.

Keywords

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