Exploiting SIMD parallelism in DSP and multimedia algorithms using the AltiVec technology

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Abstract
AltiVec technology is Motorola's high-performance vector parallel processing extension to the PowerPCtm RISC microprocessor. It is designed to improve the performance of algorithms and applica- tions that can exploit data parallelism such as tho se in digital signal processing (DSP) and multimedia. In this paper, we investigate the behavior of the AltiVec technology on a set of common DSP and multimedia algorithms. These algorithms include digital filters, fast Fourier transforms, inverse dis- crete cosine transforms, and vector arithmetic. Ea ch algorithm has one non-AltiVec version, and one version implemented with the AltiVec instruction se t by using the AltiVec programming model. The AltiVec version of the algorithms is evaluated usin g an AltiVec emulator. Traces for both versions are obtained by using an AltiVec-enabled trace genera- tor, and trace-driven simulation is performed by using a cycle-accurate performance simulator. The observed speedup for the AltiVec version of DSP and multimedia algorithms ranges from a factor of 1.60 up to 11.66, and the number of dynamic instructions is reduced by a factor of 1.82 up to 10.25. In add i- tion to quantifying the speedup, we also perform detailed instruction level analysis, which helps to understand issues that become significant while uti l- izing AltiVec to exploit SIMD parallelism. Efficie nt utilization of a vector extension such as AltiVec c ur- rently requires significant programming effort.

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