A Low-Power Multiphase Circuit Technique

Abstract

The principle of multiphase MOS digital circuits is briefly discussed and the features of some presently used multi-phase schemes are given. The basic theory and implementation of a six-phase scheme, which make use of a basic principle not normally considered in low-power digital circuitry, are then described, and the first-order equations for power dissipation are derived. The theoretical power dissipation of a six-phase shift register is compared to the power dissipation of equivalent shift registers using other low-power circuit techiques, including the complementary MOS transistor technique, and it is shown that the six-phase technique has the lowest power dissipation from very low frequencies up to a limiting high frequency. Finally, the power dissipation of an actual six-phase circuit is compared to the dissipation predicted from the derived equations.

Keywords

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The silicon insulated-gate field-effect transistor
Proceedings of the IEEE, 1963