A real-time experiment using a 50-neuron CMOS analog silicon chip with on-chip digital learning
- 1 July 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Neural Networks
- Vol. 2 (4) , 461-464
- https://doi.org/10.1109/72.88166
Abstract
The authors present initial results of a pattern/character recognition and association experiment using a newly fabricated 50-neuron CMOS analog silicon chip with digital on-chip learning. Attention is given to the circuit architecture, the VLSI chips, and the interface circuitry.Keywords
This publication has 3 references indexed in Scilit:
- Neural circuits for programmable analog MOS VLSI implementationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A model of neural circuits for programmable VLSI implementationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- New artificial neural net models: basic theory and characteristicsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002