An Approach to Scientific Array Processing: The Architectural Design of the AP-120B/FPS-164 Family

1 September 1981

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in Computer

Vol. 14 (9) , 18-27
https://doi.org/10.1109/c-m.1981.220595

Abstract

Architecture, not hardware, gives the FPS array processor family its computational speed. Here is an inside look at the trade-offs and ideas that went into its design.

Keywords

ARRAY SIGNAL PROCESSING
PROCESS DESIGN
SIGNAL PROCESSING ALGORITHMS
COMPUTER ARCHITECTURE
SCIENTIFIC COMPUTING
CONVOLUTION
KERNEL
COSTS
FLOATING-POINT ARITHMETIC
COMPUTER INTERFACES

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