The variation in electromigration performance measured by the median time to failure (t50) and the standard deviation (σ) of the failure times for a number of lots was studied. It was found that regardless of the metallization technology, a lot-to-lot variation of between 5× and 10× in both t50 and σ can be expected during normal processing. The implications of this finding for predicting chip reliability with regard to electromigration failures are discussed.