Overview of memory channel network for PCI
- 23 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The parallel performance of a cluster is often limited by performance compromises in conventional networks. This paper discusses the benefits of a more specialized networking approach and the resulting design of a low-cost, high-performance interconnect optimized specifically to enhance both the parallel performance and high-availability aspects of a cluster. This interconnect, Memory Channel Network for PCI, attaches to the industry-standard PCI bus found in most computers. The first-generation product, running on a standard Digital UNIX Cluster, provides cluster communication latency and overhead improvements of more than 50 and 1000 times respectively, compared to conventional networks.Keywords
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