IntraChip Optical Networks for a Future Supercomputer-on-a-Chip
- 1 August 2007
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Si photonics for on- and off-chip communications in future multicore microprocessor chips is considered. Using 3D integration to combine an on-chip optical network plane with a separate microprocessor plane can significantly improve the performance/watt of multicore chips.Keywords
This publication has 10 references indexed in Scilit:
- On the Design of a Photonic Network-on-ChipPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2007
- A Hybrid AlGaInAs–Silicon Evanescent AmplifierIEEE Photonics Technology Letters, 2007
- 125 Gbit/s carrier-injection-based silicon micro-ring silicon modulatorsOptics Express, 2007
- Ultracompact optical buffers on a silicon chipNature Photonics, 2006
- A Fully Integrated 20-Gb/s Optoelectronic Transceiver Implemented in a Standard 0.13-$\mu{\hbox {m}}$ CMOS SOI TechnologyIEEE Journal of Solid-State Circuits, 2006
- A 15-Gb/s 2.4-V Optical Receiver Using a Ge-on-SOI Photodiode and a CMOS ICIEEE Photonics Technology Letters, 2006
- Silicon CMOS devices beyond scalingIBM Journal of Research and Development, 2006
- Interconnections in Multi-Core ArchitecturesACM SIGARCH Computer Architecture News, 2005
- The future of wiresProceedings of the IEEE, 2001
- Clock rate versus IPCACM SIGARCH Computer Architecture News, 2000