Abstract
Pseudo-random binary sequence (PRBS) generators are widely used for testing communication systems. This paper describes a fully integrated PRBS generator, supporting output data rates between 1-58 Gb/s, with output jitter below 1.1 ps RMS, requiring only a single reference clock input. This has been achieved, based on impedance-matched clock signal distribution and transmission line modelling. Two half-rate outputs from the PRBS generator core are multiplexed to form the high-speed data output. The IC provides a trigger signal output plus all-zero detection and correction functionality.

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