Design techniques of reducing chip area and highly integrated MMIC for W-band application
- 13 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 3 (0149645X) , 2167-2170
- https://doi.org/10.1109/mwsym.2001.967344
Abstract
In this paper, several novel techniques for minimizing chip area are presented. In order to demonstrate these features, we have developed a three stage W-band amplifier. This MMIC exhibits more than 15 dB gain from 75 GHz to 90 GHz, and size of this MMIC is less than 0.5 mm/sup 2/. We have also designed and fabricated a single chip 77 GHz T/R MMIC for automotive radar. This MMIC includes 25 active circuits in one chip, and size of this MMIC is less than 8.5 mm/sup 2/.Keywords
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