On oxide—nitride interface traps by thermal oxidation of thin nitride in metal-oxide-nitride-oxide-semiconductor memory structures

1 February 1986

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 33 (2) , 214-217
https://doi.org/10.1109/t-ed.1986.22468

Abstract

Charging properties of metal-oxide(top-oxide)-nitride-oxide (tunnel-oxide)-semiconductor (MONOS) memory structures characterized by very low program voltage have been investigated and analyzed. By comparing the experimental observations with theoretical calculations, the capture cross section of the electron traps generated at the top oxide-nitride interface by thermal oxidation of the thin nitride primarily effecting the memory action of the MONOS devices is estimated to be about 6 × 10 ^-14 cm ² .

Keywords

CHEMICALS
CAPACITORS
SILICON
OXIDATION
TIME MEASUREMENT
LOW VOLTAGE

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