Trench-isolated transistors in lateral CVD epitaxial silicon-on-insulator films

1 November 1984

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters

Vol. 5 (11) , 449-451
https://doi.org/10.1109/edl.1984.25983

Abstract

Completely dielectrically isolated, p-channel MOS transistors have been obtained by lateral chemical vapor deposition (CVD) epitaxial overgrowth of buried oxide layers and subsequent lateral isolation with refilled trenches. The transistor characteristics are similar to those in bulk control wafers. Isolation between the device island and the substrate is approximately 10¹²Ω.

Keywords

SILICON ON INSULATOR TECHNOLOGY
SEMICONDUCTOR FILMS
DIELECTRIC SUBSTRATES
TEMPERATURE
CHEMICAL VAPOR DEPOSITION
INTEGRATED CIRCUIT TECHNOLOGY
ISOLATION TECHNOLOGY
DIELECTRIC FILMS
SILICON COMPOUNDS
INTEGRATED CIRCUIT YIELD