Deterministic Simulation of Idealized Parallel Computers on More Realistic Ones

Abstract
We describe a deterministic simulation of PRAMs on module parallel computers (MPCs) and on processor networks of bounded degree. The simulating machines have the same number n of processors as the simulated PRAM, and if the size of the PRAM's shared memory is polynomial in n, each PRAM step is simulated by O(log n) MPC steps or by O((log n)2) steps of the bounded degree network. This improves upon a previous result by Upfal and Wigderson. We also prove an ((log n)2/log log n) lower bound on the number of steps needed to simulate one PRAM step on a bounded degree network under the assumption that the communication in the network is point-to-point.

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