Optimal interconnection circuits for VLSI
- 1 May 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 32 (5) , 903-909
- https://doi.org/10.1109/t-ed.1985.22046
Abstract
The propagation delay of interconnection lines is a major factor in determining the performance Of VLSI circuits because the RC time delay of these lines increases rapidly as chip size is increased and cross-sectional interconnection dimensions are reduced. In this paper, a model for interconnection time delay is developed that includes the effects of scaling transistor, interconnection, and chip dimensions. The delays of aluminum, WSi2, and polysilicon lines are compared, and propagation delays in future VLSI circuits are projected. Properly scaled multilevel conductors, repeaters, cascaded drivers, and cascaded driver/ repeater combinations are investigated as potential methods for reducing propagation delay. The model yields optimal cross-sectional interconnection dimensions and driver/repeater configurations that can lower propagation delays by more than an order of magnitude in MOSFET circuits.Keywords
This publication has 21 references indexed in Scilit:
- Optimal interconnect circuits for VLSIPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- Approximation of wiring delay in MOSFET LSIIEEE Journal of Solid-State Circuits, 1983
- The wire-limited logic chipIEEE Journal of Solid-State Circuits, 1982
- Effect of Scaling of Interconnections on the Time Delay of VLSI CircuitsIEEE Journal of Solid-State Circuits, 1982
- A transmission line model for silicided diffusions: Impact on the performance of VLSI circuitsIEEE Transactions on Electron Devices, 1982
- Speed limitations due to interconnect time constants in VLSI integrated circuitsIEEE Electron Device Letters, 1982
- Coupling capacitances for two-dimensional wiresIEEE Electron Device Letters, 1981
- Analytical IC Metal-Line Capacitance Formulas (Short Papers)IEEE Transactions on Microwave Theory and Techniques, 1976
- Capacitance models for integrated circuit metallization wiresIEEE Journal of Solid-State Circuits, 1975
- Electrical-Resistivity Model for Polycrystalline Films: the Case of Arbitrary Reflection at External SurfacesPhysical Review B, 1970