Multiple-Fault Detection and Location in Fan-Out Free Combinational Circuits
- 1 January 1974
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-23 (1) , 48-55
- https://doi.org/10.1109/T-C.1974.223776
Abstract
Two algorithms are presented for the detection and location of single or multiple stuck faults in a fan-out free combinational circuit. The algorithms are based on a canonic representation of the indistinguishability classes of faults. The number of tests required in these algorithms are shown to be a linear function of the number of gates in the circuit.Keywords
This publication has 0 references indexed in Scilit: