Algorithm partition and parallel recognition of general context-free languages using fixed-size VLSI architecture
- 31 December 1986
- journal article
- Published by Elsevier in Pattern Recognition
- Vol. 19 (5) , 361-372
- https://doi.org/10.1016/0031-3203(86)90003-8
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- Space-Time Domain Expansion Approach to VLSI and Its Application to Hierarchical Scene MatchingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern RecognitionIEEE Transactions on Pattern Analysis and Machine Intelligence, 1984
- Speed of Recognition of Context-Free Languages by Array AutomataSIAM Journal on Computing, 1975
- General context-free recognition in less than cubic timeJournal of Computer and System Sciences, 1975