A 320 MHz CMOS triple 8b DAC with on-chip PLL and hardware cursor
- 17 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
High-speed DACs make desktop computer graphics possible. As screen resolutions increase, faster DACs are required to drive them. Other applications such as direct digital synthesis also require fast DACs. This paper describes a 0.8 /spl mu/m CMOS-only circuit that upconverts 40 MHz input signals to create triple 8b analog outputs running at a clock rate of 320 MHz. The chip includes an 8:1 input mux, triple 8b DACS, and an on-chip PLL to generate clocks. The chip also includes all logic necessary for implementing an X-window-compatible 64/spl times/64/spl times/2 hardware cursor function.<>Keywords
This publication has 1 reference indexed in Scilit:
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