Composite step-graded collector of InP/InGaAs/InPDHBT for minimised carrier blocking

18 July 1996

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 32 (15) , 1409-1410
https://doi.org/10.1049/el:19960889

Abstract

A composite step-graded collector of InP/InGaAs/InP DHBT has been investigated for minimised carrier blocking. The optimised collector has the following sub-layers: a 100 Å n^- InGaAs layer; three 200 Å n^- InGaAsP layers; and a 100 Å, n = 3 × 10¹⁷ cm^-3 InP layer, and the rest are n^- InP. The InGaAsP layers should be chosen to give approximately equal band offset at the heterointerfaces.

Keywords

This publication has 3 references indexed in Scilit:

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