A high speed molybdenum gate MOS RAM
- 1 October 1978
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 13 (5) , 611-616
- https://doi.org/10.1109/jssc.1978.1051108
Abstract
Describes a high speed 16K molybdenum gate (Mo-gate) dynamic MOS RAM using a single transistor cell. New circuit technologies, including a capacitive-coupled sense-refresh amplifier and a dummy sense circuit, enable the achievement of high speed performance in combination with reduced propagation delay in the molybdenum word line due to the low resistivity. The n-channel Mo-gate process was established by developing an evaporation apparatus and by an improved heat treatment to reduce surface charge density. Ultraviolet photolithography for 2 /spl mu/m patterns and HCl oxidation for 400 /spl Aring/ thick gate oxide are used. The 16K word/spl times/1 bit device is fabricated on a 3.2 mm/spl times/4.0 mm chip. Cell size is 16 /spl mu/m/spl times/16 /spl mu/m Access time is less than 65 ns at V/SUB DD/=7 V and V/SUB BB/=-2 V. Power dissipation is 210 mW at 170 ns read-modify-write (RMW) cycle.Keywords
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