Patterning pentacene organic thin film transistors

Abstract
Organic semiconductors have demonstrated excellent electrical performance, in some cases rivaling inorganic systems in use today. These materials, which are processed at or near room temperature, have attracted considerable interest because they would enable the creation of active circuitry on organic substrates leading to a new generation of displays, rf identification systems, and smartcards. Many of these materials are intolerant to wet processing, however. This has led to a major processing limitation: the lack of a subtractive photolithographic patterning process to define active regions of the semiconductor. This article presents a process which uses a dry organic encapsulant (parylene) as a boundary layer between an organic semiconductor (pentacene) and photolithographic chemicals. Traditional photolithography may then be performed to use a dry etch to pattern the material stack. This process, which is fully subtractive, opens the path to the use of these materials in a wide range of applications.