A linear-processor polylog-time algorithm for shortest paths in planar graphs
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 24 references indexed in Scilit:
- A unified geometric approach to graph separatorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A contraction procedure for planar directed graphsPublished by Association for Computing Machinery (ACM) ,1992
- Towards overcoming the transitive-closure bottleneck: efficient parallel algorithms for planar digraphsPublished by Association for Computing Machinery (ACM) ,1990
- Parallel algorithms for minimum cuts and maximum flows in planar networksJournal of the ACM, 1987
- Finding small simple cycle separators for 2-connected planar graphsJournal of Computer and System Sciences, 1986
- An $O(n\log ^2 n)$ Algorithm for Maximum Flow in Undirected Planar NetworksSIAM Journal on Computing, 1985
- A separator theorem for graphs of bounded genusJournal of Algorithms, 1984
- Parallel algorithms for minimum cuts and maximum flows in planar networksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982
- Maximum flow in (s,t) planar networksInformation Processing Letters, 1981
- Efficient Algorithms for Shortest Paths in Sparse NetworksJournal of the ACM, 1977