Fast Track-Finding Trigger Processor for the SLAC/LBL Mark II Detector

1 February 1978

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science

Vol. 25 (1) , 692-697
https://doi.org/10.1109/tns.1978.4329394

Abstract

The SLAC/LBL Mark II Magnetic Detector consists of various particle detectors arranged in cylindrical symmetry located in and around an axial magnetic field. A versatile, programmable secondary trigger processor has been designed and built to find curved tracks in the detector. The system operates at a 10 MHz clock rate with a total processing time of 34μsec, and is used to "trigger" the data processing computer, thereby rejecting background and greatly improving the data acquisition aspects of the detector-computer combination.

Keywords

This publication has 2 references indexed in Scilit:

Simple CAMAC Test System Based on the S-100 Bus
IEEE Transactions on Nuclear Science, 1978
Pattern recognition processor and its application to straight line reconstruction of spark chamber data
Nuclear Instruments and Methods, 1973