Optimal tile size adjustment in compiling general DOACROSS loop nests

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Abstract
In practical problems, such as the relaxation methods used to solve partial differential equations, a DOACROSS loop nest often appears. It is characterized by loop-carried dependence, which require interprocessor communication within the loop. Tiling, a technique for compiling DOACROSS loop nests for massively parallel processors, reduces communication overhead by grouping multiple iterations into a tite. Taking larger tiles reduces the number of communications but also causes a delay in starting the 2nd and the following processors. We examine this tradeoff theoretically and present a tiling method for general DOACROSS loop nests. In particular, we show how to determine the optimal tile size. Experimental results are very close to those predicted by our theory. We have implemented the method in a compiler prototype, with which we have parallelized an SOR program. The parallelized code is more than ten times as fast as the code without tiling and 1 l% faster than the code with non-optimal tiling.

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