Valve Damping Circuit Design for HVDC Systems
- 1 September 1973
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Apparatus and Systems
- Vol. PAS-92 (5) , 1615-1621
- https://doi.org/10.1109/TPAS.1973.293709
Abstract
This paper presents a method of calculating the recovery overvoltages in a HVDC circuit and the optimization of the damping circuit by selecting the lowest value of the damping circuit capacitance and the resistance which together satisfactorily limit the recovery voltage. Furthermore, a new method is developed for exact calculation of the losses in the damping circuit using a hybrid computer. The effect of the bridge operation (commutating and delay angles) and damping circuit parameters on the losses are analyzed using numerical examples. Finally, a method for designing the valve damping circuit is presented.Keywords
This publication has 4 references indexed in Scilit:
- The Calculation of Turn-off Overvoltages in a High Voltage dc Thyristor ValveIEEE Transactions on Power Apparatus and Systems, 1972
- The Calculation of Turn-On Overvoltages in a High Voltage dc Thyristor ValveIEEE Transactions on Power Apparatus and Systems, 1971
- Commutation transients in h.v.d.c. convertors during normal and abnormal conditionsProceedings of the Institution of Electrical Engineers, 1970
- Commutation phenomena in a static power convertorProceedings of the Institution of Electrical Engineers, 1964