ILAC: an automated layout tool for analog CMOS circuits
- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 7.6/1-7.6/4
- https://doi.org/10.1109/cicc.1988.20820
Abstract
A description is given of ILAC (Interactive Layout of Analog CMOS Circuits), a CAD (computer-aided design) tool that automatically generates geometrical layout for analog CMOS leaf cells from netlist information and user-specified constraints on cell bounds and input/output locations. ILAC is the companion tool of IDAC, a design tool that sizes analog CMOS circuits from a library of proven schematics given a set of functional specifications and technological parameters. Unlike existing analog silicon compilers that use some predefined placement for a specific type of circuit, ILAC determines an optimal layout for any circuit and any set of input parameters.<>Keywords
This publication has 5 references indexed in Scilit:
- SALIM: a layout generation tool for analog ICsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- IDAC: an interactive design tool for analog CMOS circuitsIEEE Journal of Solid-State Circuits, 1987
- A New Algorithm for Floorplan DesignPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986
- CMOS voltage references using lateral bipolar transistorsIEEE Journal of Solid-State Circuits, 1985
- MOS transistors operated in the lateral bipolar mode and their application in CMOS technologyIEEE Journal of Solid-State Circuits, 1983