A non-linear description of the bias dependent parasitic resistances of quarter micron MOSFETs

28 November 2002

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 97-99
https://doi.org/10.1109/smelec.1998.781157

Abstract

–A new,model description for source and drain resistances of LDD devices is proposed. It includes the dependence on the gate, bulk and drain bias. Measurements on a 0.25 µm gate length device show excellent agreement with circuit simulation.

Keywords

HUMAN COMPUTER INTERACTION
LENGTH MEASUREMENT
ART
RESISTORS
ELECTRIC RESISTANCE
VOLTAGE
DOPING

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