High-Speed Binary Adder
- 1 March 1981
- journal article
- Published by IBM in IBM Journal of Research and Development
- Vol. 25 (3) , 156-166
- https://doi.org/10.1147/rd.252.0156
Abstract
Based on the bit pair (ai, bi) truth table, the carry propagate pi and carry generate gi have dominated the carry-look-ahead formation process for more than two decades. This paper presents a new scheme in which the new carry propagation is examined by including the neighboring pairs (ai, bi; ai+1, bi+1). This scheme not only reduces the component count in design, but also requires fewer logic levels in adder implementation. In addition, this new algorithm offers an astonishingly uniform loading in fan-in and fan-out nesting.Keywords
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