Various attempts have been made to analyze the yield of IC's as a function of active circuit area, using as models different probability distribution functions of spot defects. The purpose of this paper is to show that most of the proposed models form a family of functions which correspond to a parametric family of power transformations from yield to yield to the power λ, the parameter λ defining a particular transformation. A comparison between the power transformation approach to earlier modeling techniques will be discussed. After developing the necessary statistical theory, a simple procedure for the model building process will be presented.