Quantized Conductance of a Silicon Wire Fabricated by Separation-by-Implanted-Oxygen Technology

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Abstract
Ultra-fine silicon wires have been fabricated by SIMOX (Separation by IMplanted OXygen) technology, electron beam lithography, anisotropic chemical etching, and thermal oxidation. The silicon wires have a trapezoidal cross-sectional shape and are fully surrounded by SiO2, as confirmed by transmission electron microscopy. The size of the wires is controlled by using the fabrication method proposed here, as measured by scanning electron microscopy. A wire 20 nm wide and 6 nm high exhibits quantized conductance at 26 K, and conductance steps remain up to 60 K. In the case of a wire 17 nm wide and 4 nm high, steplike structures in the conductance versus gate voltage curve persist over 100 K. These results are attributed to the large subband energy spacing in the narrow wire region, where electrons are physically confined by the high potential of the SiO2 barrier.

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