VA-6 two-dimensional simulation of latch-up in CMOS structure
- 1 October 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 29 (10) , 1695
- https://doi.org/10.1109/t-ed.1982.20988
Abstract
No abstract availableThis publication has 0 references indexed in Scilit: