A systolic architecture for fast stack sequential decoders
- 1 February 1994
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Communications
- Vol. 42 (2/3/4) , 324-335
- https://doi.org/10.1109/tcomm.1994.577044
Abstract
No abstract availableThis publication has 21 references indexed in Scilit:
- Further results on high-rate punctured convolutional codes for Viterbi and sequential decodingIEEE Transactions on Communications, 1990
- High-rate punctured convolutional codes for Viterbi and sequential decodingIEEE Transactions on Communications, 1989
- Rate-compatible punctured convolutional codes (RCPC codes) and their applicationsIEEE Transactions on Communications, 1988
- Coding for Satellite CommunicationIEEE Journal on Selected Areas in Communications, 1987
- Error-Correction Coding for Digital CommunicationsPublished by Springer Nature ,1981
- Convolutional codes III. Sequential decodingInformation and Control, 1974
- Convolutional codes II. Maximum-likelihood decodingInformation and Control, 1974
- Practical applications of codingIEEE Transactions on Information Theory, 1974
- Convolutional codes I: Algebraic structureIEEE Transactions on Information Theory, 1970
- A heuristic discussion of probabilistic decodingIEEE Transactions on Information Theory, 1963