Optimization of sidewall masked isolation process

1 February 1985

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 32 (2) , 124-131
https://doi.org/10.1109/t-ed.1985.21921

Abstract

This paper presents modifications of the Sidewall Masked Isolation (SWAMI) process for VLSI device isolation which improve process reproducibility, eliminate stress induced defects, and permit flexibility in channel stop implant optimization. A novel "undercut-and-backfill" technique is introduced to eliminate a localized failure mechanism of the oxidation mask by increasing the strength of the nitride-to-nitride joint. The primary variable influencing stress-induced defect generation is the vertical length of the sidewall nitride mask as determined by the amount of recessed silicon etch prior to sidewall nitride formation. In general, a maximum length can be found below which defect-free structures can be fabricated. An optional second recessed silicon etch, following the formation of the sidewall nitride, has been developed which increases the flexibility in optimizing the channel stop implantation. Defect-free low-leakage devices with near-zero electrical channel width reduction have been obtained.

Keywords

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