Abstract
A simple wafer-level RF power test methodology is presented that is helpful in the characterization of in-process wafers for RF output power density and drain efficiency. The test is particularly useful in screening anomalous time-dependent defects which are transparent to normal DC tests. In addition, it allows direct measurement of the impact on power density of a critical process step, such as silicon nitride deposition, as well as the removal from process of all out-of-spec wafers.

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