Depletion m.o.s. power transistors
- 13 November 1975
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 11 (23) , 565-566
- https://doi.org/10.1049/el:19750431
Abstract
A new depletion m.o.s. transistor is proposed. The structure uses anisotropic etching to define the channel in an n–p epitaxial silicon slice. The fabrication, characteristics and power capabilities of the device are discussed.Keywords
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