Local oxidation of silicon/CMOS: Technology/design system for LSI in CMOS

1 January 1974

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XVII, 60-61
https://doi.org/10.1109/isscc.1974.1155337

Abstract

The LOCMOS process and its ability to increase packing density and reduce cost of LSI CMOS circuits will be presented. A computer-aided layout system which can be used for wildlogic circuits using this technology will also be described.

Keywords

CMOS TECHNOLOGY
OXIDATION
SILICON
LARGE SCALE INTEGRATION
INTEGRATED CIRCUIT INTERCONNECTIONS
ALUMINUM
LOGIC TESTING
COMPUTATIONAL MODELING
LAN INTERCONNECTION
COUNTING CIRCUITS

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